Journal of Shanghai University(Natural Science Edition) ›› 2015, Vol. 21 ›› Issue (5): 570-578.doi: 10.3969/j.issn.1007-2861.2014.05.015

• Metallurgical Materials • Previous Articles     Next Articles

Design and implementation of FPGA 10 Gbit/s reliable interconnect communication based on IP protocol

SONG Yu-fei, ZHANG Jun-jie, WANG Kai, LI Jia-qi, XUE Zi-wei, ZHENG Yue   

  1. Key Laboratory of Specialty Fiber Optics and Optical Access Networks, Shanghai University, Shanghai 200444, China
  • Received:2014-08-05 Online:2015-10-30 Published:2015-10-30

Abstract: In recent years, cloud computing and big data processing have been rapidly developed. Since field programmable gate array (FPGA) has the unique parallel processing ability, it is widely used in big data processing. As the performance of communication network directly affects the performance of big data processing, this paper presents a high speed and reliable communication system based on IP protocol for FPGA communications. The system uses a three-pointer ring buffer pool and a method of parallel number management to achieve data transmission at a line-speed of 10 Gbit/s. By implementing hardware timeout retransmission mechanism, the system can guarantee reliable communications. A self-defined reliable IP protocol is used in the system, which has a small overhead and a good system expansion. Tests on the FPGA hardware platform show that the real data transfer speed can reach 9.33 Gbit/s.

Key words: big data, communication, field programmable gate array (FPGA), interconnection

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