According to the advantages of ternary optical computer such as reconfigurable arithmetic unit, large number of data bits and no-carry-delay MSD adder, a 40-bit multiplication routine is designed and developed. In the routine, the numerical value is expressed with the MSD number system as in a ternary optical computer. Partial products are generated via a three-valued logic transform (M). The product is obtained by summing all partial products through an MSD adder using an iterative method. A fast-calculation method is applied in the M transform, and a pipeline technology used in the MSD adder to accumulate the partial products. The operation steps and simulation experiments of the routine are given in detail, and the performance comparing with electronic computer
analyzed.
HU Xiao-jun, JIN Yi, OUYANG Shan
. A 40-Bit Multiplication Routine of Ternary Optical Computer[J]. Journal of Shanghai University, 2014
, 20(5)
: 645
-657
.
DOI: 10.3969/j.issn.1007-2861.2014.01.003
[1] 金翊, 王宏健, 沈云付, 等. 可重构三值光学处理器的原理、基本结构和实现[J]. 中国科学: 信息科学, 2012, 42(6): 012.
[2] 金翊, 何华灿, 吕养天. 三值光计算机的基本原理[J]. 中国科学: E 辑, 2003, 33(2): 111-115.
[3] 严军勇, 金翊, 左开中. 无进(借) 位运算器的降值设计理论及其在三值光计算机中的应用[J]. 中国科学: E 辑, 2008, 38(12): 2112-2122.
[4] 金翊, 沈云付, 彭俊杰, 等. 三值光学计算机中MSD 加法器的理论和结构[J]. 中国科学: 信息科学, 2011, 41(5): 541-551.
[5] Waser S. High-speed monolithic multipliers for real-time digital signal processing [J]. Computer, 1978, 11(10): 19-29.
[6] Ma G K, Taylor F J. Multiplier policies for digital signal processing [J]. ASSP Magazine, IEEE, 1990, 7(1): 6-20.
[7] 于敦山, 沈绪榜. 32 位定/浮点乘法器设计[J]. 半导体学报, 2001, 22(1): 91-95.
[8] 葛亮, 唐志敏. 一种支持无符号数的流水线乘法器[J]. 微电子学与计算机, 2002, 19(10): 17-19.
[9] 高桓, 金翊, 宋凯. 针对三值光学计算机的C 语言扩展[J]. 上海大学学报: 自然科学版, 2013, 19(3): 280-285.
[10] 张茜, 金翊, 宋凯, 等. 在超算集群中使用三值光学计算机的MPI 编程技术[J]. 上海大学学报: 自然科学版, 2014, 20(2): 180-189.
[11] 金翊. 三值光计算机高数据宽度的管理策略[J]. 上海大学学报: 自然科学版, 2007, 13(5): 519-523.
