Abstract:

 The way in which the bit timing of controller area network (CAN) bus communication is dealt with determines whether the CAN controller can receive or transmit data correctly. This paper presents a structure of nominal bit time and the principle of bit synchronization. We give an optimized method of nominal bit time of CAN〖KG*1/9〗2.0 protocol that the four nonoverlapping segments of traditional nominal bit time is simplified to 3 nonoverlapping segments. Based on this, we propose a design method for bit timing processor （BTP） of CAN bus on the synchronized state machine. We also provide programmable time segments to compensate for the propagation delay times and phase shifts, and show simulation and verification of the design. The results show that the design in line with the CAN 2.0 protocol can more easily deal with the CAN bus communication bit timing. Control of CAN bus protocol on the bit timing and bit synchronization is realized, which better optimizes the CAN network.

Key words: nominal bit time; synchronization; bit timing processor (BTP); controller area network (CAN) bus