Abstract:

A source synchronized clock transmission method is proposed based on inter-packet gap (IPG) of Ethernet running in a full-duplex mode. A synchronous residual time stamp (SRTS) is adopted as the clock transmission algorithm. The characteristic of the new method is immune to fluctuation for in-band Ethernet traffic. Parameters of the SRTS algorithm used in Ethernet IPG and the output jitter waveform of recovered clock are determined by using continued fraction. Simulation results and field programmable gate array (FPGA) implementation are given to demonstrate high quality of the recovered clock.

Key words: inter-packet gap (IPG); synchronous residual time stamp (SRTS); source clock synchronization