Abstract:

Complex full-chip system verification and interface nodes analysis between analog and digital circuit are a bottle-neck in mixed-signal system design. In this paper， a mixed-signal verification method based on NanoSimVCS is proposed, which is used to verify SHU-MV06, a mixed-signal design including Verilog and SPICE. This method provides efficient simulation with high accuracy and speed by performing speed-versus-accuracy tradeoffs. Defects can be found in time at an early stage and the design quality can be improved significantly.

Key words:  analog and mixed-signal (AMS) verification; NanoSim-VCS; System-on-Chip (SoC)