Abstract: A novel data-shifting method is proposed to address the shift-efficiency problem of the variable-length modified signed digit（MSD） adder used in a ternary optical computer（TOC）. Using this method, a corresponding distance-configurable shift register is designed. The new shifting method sets bypass paths for each register’s input and output lines, connecting them to different bit lines of the data bus. A 1-bit latch controls the electronic switch of each bypass, and the shifting distance can be adjusted by setting the latch, thereby enabling rapid shifting over specified positions. This method resolves the problem of low efficiency caused by the bit-by-bit shifting limitation of the current shift register, which uses a series of D flip-flops（DFFs）. This paper discusses the principles of the new shifting technology and implementation of the proposed shift register, providing six distance-configurable shift register examples. The shift registers in the examples are compared with traditional shift registers in an experimental analysis. The results demonstrate that the novel shifting technology significantly outperforms the traditional shifting technology in terms of clock frequency, shift latency, hardware resource utilization, and power consumption, markedly enhancing the performance of the MSD adder in TOC.

Key words: ternary optical computer（TOC）, modified signed digit（MSD） adder, shift register