近年来, 云计算和大数据处理迅猛发展, 现场可编程门阵列(field programmable gate array, FPGA)由于拥有独特的并行处理能力, 已在大数据处理中得到广泛应用. 而通信网络的好坏会直接影响大数据处理的性能, 基于此提出一种基于IP协议的FPGA万兆可靠保序互联通信系统, 基于三指针环形缓冲池以及并行序号管理实现线速万兆数据通信, 利用硬件超时重传机制实现可靠数据通信. 该系统与用户接口采用先进先出(first in first out, FIFO)队列方式, 接口简单; 采用IP协议进行通信, 使得通信协议开销较小, 具有良好的系统扩展性; 实际传输速率可达9.33 Gbit/s.
In recent years, cloud computing and big data processing have been rapidly developed. Since field programmable gate array (FPGA) has the unique parallel processing ability, it is widely used in big data processing. As the performance of communication network directly affects the performance of big data processing, this paper presents a high speed and reliable communication system based on IP protocol for FPGA communications. The system uses a three-pointer ring buffer pool and a method of parallel number management to achieve data transmission at a line-speed of 10 Gbit/s. By implementing hardware timeout retransmission mechanism, the system can guarantee reliable communications. A self-defined reliable IP protocol is used in the system, which has a small overhead and a good system expansion. Tests on the FPGA hardware platform show that the real data transfer speed can reach 9.33 Gbit/s.
[1] 秦秀磊, 张文博, 魏峻, 等. 云计算环境下分布式缓存技术的现状与挑战[J]. 软件学报, 2013, 24(1): 50-66.
[2] 陈如明. 大数据时代的挑战、价值与应对策略[J]. 中国国际信息通信展专刊, 2012(17): 14-15.
[3] 李波, 曹福毅, 王祥凤. 高性能计算技术发展概述[J]. 沈阳工程学院学报: 自然科学版, 2012, 8(3): 252-254.
[4] 杨海钢, 孙嘉斌, 王慰. FPGA器件设计技术发展综述[J]. 电子与信息学报, 2010(3): 714-727.
[5] 张兴军, 丁彦飞, 黄一元, 等. 基于FPGA的动态部分可重构高性能计算实现[J]. 华中科技大学学报: 自然科学版, 2010, 38: 82-86.
[6] 朱小谦, 孟祥飞, 菅晓东, 等. “天河一号”大规模并行应用程序测试[J]. 计算机科学, 2012(3): 265-267.
[7] Senouci B, Kouadri M A M, Rousseau F, et al. Multi-CPU/FPGA platform based heterogeneous multiprocessor prototyping: new challenges for embedded software designers [C]//The 19th IEEE/IFIP International Symposium on Rapid System Prototyping. 2008: 41-47.
[8] Romoth J, Jungewelter D, Hagemeyer J, et al. Optimizing inter-FPGA communication by automatic channel adaptation [C]//2012 International Conference on Reconfigurable Computing and FPGAs (ReConFig). 2012: 1-7.
[9] Mak T S T, Sedcole P, Cheung P Y K, et al. On-FPGA communication architectures and design factors [C]//International Conference on Field Programmable Logic and Applications. 2006: 1-8.
[10] 韩高飞, 杜慧敏, 蒋林, 等. 基于FPGA的NoC验证平台的构建[J]. 电子设计工程, 2010(3): 90-93.
[11] Liu Y, Liu P, Jiang Y, et al. Building a multi-FPGA-based emulation framework to support networks-on-chip design and verification [J]. International Journal of Electronics, 2010, 97: 1241-
1262.
[12] M¨uhlbach S, Koch A. A scalable multi-FPGA platform for complex networking applications [C]// 2011 IEEE 19th Annual International Symposium on Field-Programmable Custom Computing Machines (FCCM). 2011: 81-84.
[13] 龙玉军, 龚彬, 马卫东, 等. 基于TCP、UDP的多路多数据流融合网络系统设计[J]. 电子设计工程, 2011, 19(21): 69-72.
[14] 张齐, 劳炽元. 轻量级协议栈LWIP的分析与改进[J]. 计算机工程与设计, 2010, 31(10): 2169-2171.
[15] Zheng Y, Zhang J J, Yan K, et al. Design and implementation of multi-FPGA high-speed access to RAID [C]// 2013 IET/IEEE Second International Conference on Smart and Sustainable
City. 2013: 203-207.
