逻辑内建自测试双重过滤测试点选取策略

doi:10.12066/j.issn.1007-2861.2067

上海大学学报(自然科学版) ›› 2020, Vol. 26 ›› Issue (4): 518-526.doi: 10.12066/j.issn.1007-2861.2067

逻辑内建自测试双重过滤测试点选取策略

董承梁¹, 张金艺¹^,²(), 卿培³

1.上海大学微电子研究与开发中心,上海 200444
2.上海大学特种光纤与光接入网重点实验室,上海 200444
3.上海三思电子工程有限公司软件研发中心, 上海 201199

收稿日期:2018-06-19 出版日期:2020-08-30 发布日期:2020-09-03
通讯作者: 张金艺 E-mail:zhangjinyi@staff.shu.edu.cn
基金资助:
十三五国家重点研发计划资助项目(2017YFB0403500);上海市教委重点学科资助项目(J50104)

Double filtration test point selection strategy for LBIST

DONG Chengliang¹, ZHANG Jinyi¹^,²(), QING Pei³

1. Microelectronic Research and Development Center, Shanghai University, Shanghai 200444, China
2. Key Laboratory of Special Fiber Optics and Optical Access Networks, Shanghai University, Shanghai 200444, China
3. Software Research and Development Center, Shanghai Sansi Electronic Engineering Co., Ltd., Shanghai 201199, China

Received:2018-06-19 Online:2020-08-30 Published:2020-09-03
Contact: ZHANG Jinyi E-mail:zhangjinyi@staff.shu.edu.cn

摘要/Abstract

摘要：

为有效改善逻辑内建自测试(logic built-in self-test,LBIST)因使用伪随机向量发生器生成测试图形,而导致相关应用芯片故障覆盖率指标较低的问题,便于控制、较易调整的测试点插入(test point insertion,TPI)技术被广泛应用。然而,在 TPI 的测试点选取过程中通常基于“故障覆盖率优先”准则,进而使部分测试点面积开销过高。针对此问题,通过对现有主流选取策略的分析,提出一种应用于 LBIST 的双重过滤测试点选取策略。该策略首先通过预过滤,获得高故障覆盖率/低面积开销的单一测试点集,以保障 TPI 整体质量;其次,通过全局测试点滤取,滤除故障覆盖高度重合的单一测试点,完成符合边界条件的 TPI。实验表明,该策略与目前较新颖的紧凑型单元感知测试点选取策略相比,故障覆盖率提升 4.15%,减少测试面积开销 5.72%,充分证明该策略在提高故障覆盖率和减小测试面积上的优势。

关键词: 逻辑内建自测试, 测试点选取, 双重过滤

Abstract:

To solve the problem of low fault coverage rate in logic built-in self-test (LBIST) caused by test pattern using pseudorandom vector generator, an easily controlled and easily adjustable insertion technology of testing point has been applied. However, in the test points selection process of test point insertion (TPI), the usual criterion is ''fault coverage rate precedence'', which results in too high area overhead of some test points. To address the issue, a double filtration testing point selection strategy that can be used for LBIST has been proposed through analysis of existing mainstream selection strategies. This method first manages to obtain a single test point set of high fault coverage rate/low area overhead through pre-filtration to safeguard the whole quality of TPI. Next a single test point with high coincidence of fault coverage is filtered through filtration of global test points to complete TPI conforming to the boundary condition. Experimental results indicate that the method proposed in the paper, compared with presently novel compact unit perceived test point selection strategy, has the advantage of enhancing the fault coverage rate by 4.15%, and reducing the area overhead by 5.72%.

Key words: logic built-in self-test, test point selection, double filtration

中图分类号:

TN407

董承梁, 张金艺, 卿培. 逻辑内建自测试双重过滤测试点选取策略[J]. 上海大学学报(自然科学版), 2020, 26(4): 518-526.

DONG Chengliang, ZHANG Jinyi, QING Pei. Double filtration test point selection strategy for LBIST[J]. Journal of Shanghai University（Natural Science Edition）, 2020, 26(4): 518-526.

图/表 8

图 1

图 2

图 3

图 4

图 5

表 1

图 6

表 2

参考文献 14

[1]	LaPedus M. 浅析 7 nm 之后的工艺制程的实现[J]. 集成电路应用, 2017,34(1):50-53.
[2]	Gherman V, Wunderlich H J, Vranken H, et al. Efficient pattern mapping for deterministic logic BIST[C]// Proceedings of International Test Conference on International Test Conference. 2004: 48-56.
[3]	Sankaralingam R, Touba N A. Inserting test points to control peak power during scan testing[C]// IEEE International Symposium on Defect and Fault Tolerance in VLSI Systems. 2002: 138-146.
[4]	Chen M J, Xiang D. Pseudorandom scan BIST using improved test point insertion tech- niques[C]// 7th International Conference on Solid-State and Integrated Circuits Technology. 2004. DOI: 10.1109/ICSICT.2004.1435244.
[5]	Milewski S, Mukherjee N, Rajski J, et al. Full-scan LBIST with mcapture-per-cycle hybrid test points[C]// IEEE International Test Conference. 2017. DOI: 10.1109/TEST.2017.8242036.
[6]	Acero C, Feltham D, Liu Y, et al. Embedded deterministic test points[J]. IEEE Transactions on Very Large Scale Integration Systems, 2017,99:1-2.
[7]	Liu Y D, Moghaddam E, Mukherjee N, et al. Minimal area test points for deterministic patterns[C]// IEEE International Test Conference. 2017. DOI: 0.1109/TEST.2016.7805825.
[8]	Acero C, Feltham D, Patyra M, et al. On new test points for compact cell-aware tests[J]. IEEE Design & Test, 2016,33(6):7-14.
[9]	He M T, Contreras G K, Tehranipoor M, et al. Test-point insertion efficiency analysis for LBIST applications[C]// IEEE Transactions on Very Large Scale Integration (VLSI) Systems. 2016. DOI: 10.1109/VTS.2016.7477314.
[10]	Moghaddam E, Mukherjee N, Rajski J, et al. Test point insertion in hybrid test compression/LBIST architectures[C]// IEEE International Test Conference. 2016. DOI: 10.1109/TEST.2016.7805826.
[11]	Liang B, Zhang J, Tang D. Fast iterative closest point-simultaneous localization and mapping (ICP-SLAM) with rough alignment and narrowing-scale nearby searching[J]. Journal of Donghua University (English Edition), 2017,34(4):583-590.
[12]	Singh A D. Cell aware and stuck-open tests[C]// 21th IEEE European Test Symposium. 2016. DOI: 10.1109/ETS.2016.7519316.
[13]	Mukherjee N, Rajski J, Tyszer J. Defect aware to power conscious tests-the new DFT landscape[C]// 22nd International Conference on VLSI Design. 2009. DOI: 10.1109/VLSI.Design.2009.111.
[14]	He M T, Contreras G K, Tran D, et al. Test-point insertion efficiency analysis for LBIST in high-assurance applications[J]. IEEE Transactions on Very Large Scale Integration Systems, 2017,99:1-14.

逻辑内建自测试双重过滤测试点选取策略

Double filtration test point selection strategy for LBIST

RichHTML

PDF

可视化

摘要/Abstract

引用本文

使用本文

图/表 8

参考文献 14

相关文章 1

编辑推荐

Metrics

本文评价