计算机科学

可变距离移位技术研究与实现

  • 王彦丁 ,
  • 欧阳山 ,
  • 金翊
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  • 上海大学 计算机工程与科学学院, 上海 200444

收稿日期: 2024-10-20

  网络出版日期: 2025-07-22

Research and implementation of distance-configurable shifting technology

  • WANG Yanding ,
  • OUYANG Shan ,
  • JIN Yi
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  • School of Computer Engineering and Science, Shanghai University, Shanghai 200444, China

Received date: 2024-10-20

  Online published: 2025-07-22

摘要

针对三值光学计算机(ternary optical computer,TOC)中可变位数改良符号数字(modified signed digit,MSD)加法器所面临的移位效率问题,提出了一种全新的数据移位方式,并设计了相应的可变距离移位寄存器.该移位方式为寄存器每个位的输入线和输出线分别设置了对应数据总线不同位线的跨接旁路,每个旁路的电子开关由一位锁存器控制,通过给锁存器赋值来改变移位的距离,从而实现指定距离的快速移位,解决了当前移位寄存器因采用D触发器(D flip-flop,DFF)串连结构只能实现逐位移动而效率低下的问题.讨论了该新型移位技术的原理和可变距离移位寄存器的实现方案,给出了6个可变距离移位寄存器实例,并将这些实例与传统移位寄存器进行了对比实验.研究结果表明,该新型移位技术在时钟频率、移位延迟、硬件资源消耗和功耗方面明显优于传统移位技术,能够显著提升三值光学计算机中MSD加法器的性能.

本文引用格式

王彦丁 , 欧阳山 , 金翊 . 可变距离移位技术研究与实现[J]. 上海大学学报(自然科学版), 2025 , 31(3) : 465 -474 . DOI: 10.12066/j.issn.1007-2861.2653

Abstract

A novel data-shifting method is proposed to address the shift-efficiency problem of the variable-length modified signed digit(MSD) adder used in a ternary optical computer(TOC). Using this method, a corresponding distance-configurable shift register is designed. The new shifting method sets bypass paths for each register’s input and output lines, connecting them to different bit lines of the data bus. A 1-bit latch controls the electronic switch of each bypass, and the shifting distance can be adjusted by setting the latch, thereby enabling rapid shifting over specified positions. This method resolves the problem of low efficiency caused by the bit-by-bit shifting limitation of the current shift register, which uses a series of D flip-flops(DFFs). This paper discusses the principles of the new shifting technology and implementation of the proposed shift register, providing six distance-configurable shift register examples. The shift registers in the examples are compared with traditional shift registers in an experimental analysis. The results demonstrate that the novel shifting technology significantly outperforms the traditional shifting technology in terms of clock frequency, shift latency, hardware resource utilization, and power consumption, markedly enhancing the performance of the MSD adder in TOC.

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